2nm production reaches commercial scale
TSMC's Fab 20 in the Hsinchu Science Park has reached a monthly capacity of 20,000 wafers on its 2nm process, with the Baoshan site hitting the same level in May 2026, according to industry reporting cited by TrendForce and Economic Daily News. The company has allocated five fabrication facilities in Taiwan to its 2nm ecosystem and is targeting a 70% compound annual growth rate in 2nm capacity between 2026 and 2028. First-year 2nm wafer output is planned to be 45% higher than the first year of its 3nm production in 2023. The 2nm family will expand to include an N2P variant with backside power delivery, scheduled for mass production in the second half of 2026. 2nm revenue already contributed about 3% of TSMC's second-quarter wafer revenue, while advanced nodes of 7nm and below accounted for 77% of the total.
Arizona expansion adds fabs and packaging facilities
TSMC has pledged an additional $100 billion for Arizona, pushing its total US commitment to $265 billion, according to city of Phoenix filings and industry reporting. The expanded plan adds four more fabrication plants, two advanced packaging facilities and an R&D centre. TSMC has indicated that panel-level alternatives are not expected to replace CoWoS, the 2.5D advanced packaging process used to combine logic dies with high-bandwidth memory, for the largest AI processors any time soon — which helps explain why the United States can now produce wafers in Arizona but still depends on Taiwan to turn many of them into shippable products.
US advanced packaging gap extends into the decade
The gap between US wafer fabrication and packaging capacity is not expected to close quickly. Amkor Technology has started work on an advanced packaging and testing campus in Arizona, but production is not scheduled to begin until early 2028. TSMC's own Arizona packaging operation is targeted even later, for 2029, meaning the country will remain reliant on overseas packaging capacity for some of its most valuable AI hardware well into the decade. Analysts cited in the reporting argue that the real bottleneck in AI chip supply is no longer die manufacturing but the final integration step into usable accelerators.
Pricing pressure and the Samsung challenge
TSMC has informed major customers of planned foundry price increases of up to 10% starting in 2027, which would push its 2nm wafer price from about $30,000 to more than $33,000, according to SEDaily reporting. Against that backdrop, Samsung has signed an MOU with Broadcom covering memory and foundry collaboration, including the use of HBM4 in AI accelerators, and has secured production orders for Tesla's next-generation AI6 chips. Samsung has also signed an MOU with Anthropic covering 2nm-based AI chip design, manufacturing, and packaging. Industry observers noted that Samsung's success will depend on customer qualification, 2nm yields, advanced packaging mass-production capabilities, and final customer orders.
Lead-customer demand signals
TSMC management has confirmed that the N2 process has seen roughly four times as many tape-outs as the 3nm node at the same stage of its lifecycle, driven by smartphone performance competition and AI-related demand. Apple is expected to be the first to market, with industry analysts pointing to an A20-class chip for the next iPhone generation as the lead product. How that pipeline translates into sustained capacity utilization at the five 2nm fabs remains the key indicator to watch.
Follow-up signals
Verifiable near-term milestones include N2P mass production in the second half of 2026, the scheduled start of Amkor's Arizona packaging production in early 2028, and TSMC's targeted Arizona packaging operation in 2029.
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