Rubin GPU architecture and Vera CPU disclosures
Nvidia published detailed specifications for its next-generation Rubin GPU and the accompanying Vera CPU. The Rubin GPU combines two reticle-limited compute dies through an NV-HBI high-speed inter-die link, incorporating 336 billion transistors, 224 streaming multiprocessors and 896 Tensor Cores. A third-generation Transformer Engine is rated at up to 50 petaflops of NVFP4 inference performance, while the chip integrates up to 288 GB of HBM4 memory with up to 22 TB/s of peak bandwidth, a 2.8-times increase over Blackwell. Nvidia's internal benchmarks claim up to 10 times more agentic throughput per unit of energy than Blackwell, and NVLink 6 supplies 3,600 GB/s of scale-up bandwidth per GPU. The Vera Rubin NVL72 rack adds Intelligent Power Smoothing with energy storage, which Nvidia said cuts average power consumption by roughly 10 percent versus prior techniques and lets operators provision up to 40 percent more GPUs within the same power budget through DSX MaxLPS.
Vera CPU targets agentic workloads
The Vera CPU is built around Nvidia's custom Olympus core, designed for agentic AI tasks such as code execution, tool invocation, retrieval and database interaction. Each Vera CPU contains 88 Olympus cores with 176 SMT threads, paired with SOCAMM2 LPDDR5X memory delivering up to 1.2 TB/s of aggregate bandwidth and a Scalable Coherency Fabric providing up to 3.4 TB/s of bisectional bandwidth with a 164 MB unified L3 cache. Nvidia said the chip delivers up to 1.8 times higher performance on agentic workloads compared with x86 CPUs, based on internal SPEC CPU 2026 measurements. NVLink-C2C supplies 1,800 GB/s of coherent CPU-GPU bandwidth, and the platform supports PCIe 6.4 and CXL 3.1.
Memory cost pressures force Vera Rubin rack adjustments
An analysis from GF Securities reported that Nvidia is significantly reducing memory in its Vera Rubin NVL72 racks to address HBM4 pricing and ongoing memory shortages. The Vera Rubin NVL72 is set to ship with 96 GB SOCAMM modules instead of the earlier 192 GB modules, halving LPDDR5X capacity, while Vera CPU memory is being trimmed from 54–55 TB to 28 TB per rack. GPUs continue to use 20.7 TB of HBM4 memory per rack. GF Securities estimated that LPDDR5X costs could fall to as low as $293,000 at a quarter of the originally planned capacity, or $586,000 at half, down from a prior estimate of $1.2 million, and that without adjustments memory could account for 29 percent of a $2.1 million bill of materials, above a preferred level near 20 percent. Bernstein has separately projected HBM4 prices reaching about $53 per gigabyte in 2027 and estimated an NVL72 Rubin rack could cost roughly $9.1 million per unit.
Vera Rubin production status and roadmap defense
Earlier in July, SemiAnalysis reported that Nvidia's Kyber NVL144 rack-scale solution, designed to house the Rubin Ultra architecture, had been delayed more than 12 months to 2028. Nvidia issued a brief statement saying its roadmap was intact. Speaking to reporters at a developer event, CEO Jensen Huang said the delay reports were "not true" and that "Vera Rubin is already in production. Giant amounts of production incoming." While Nvidia had previously confirmed Vera Rubin production in January, Huang did not provide a timeline for the Kyber rack itself. Earlier this year, Huang projected combined Blackwell and Vera Rubin sales of $1 trillion through 2027. Nvidia's next earnings call is scheduled for Aug. 26.
AMD pushes Helios platform and Samsung HBM4 supply
AMD used its Advancing AI event to introduce Helios, its first rack-scale AI infrastructure platform, which bundles Instinct GPUs, EPYC processors, networking gear and the ROCm software stack into a single system. AMD said Helios is in full production and will begin shipping by the end of the third quarter. The platform is anchored by the Instinct MI455X, built on CDNA 5 with 320 billion transistors, up to 40 petaflops of FP4 performance and 23.3 TB/s of memory bandwidth per GPU using HBM4, with 72 GPUs linked into a single rack domain. AMD has also partnered with Cerebras on a low-latency inference system pairing EPYC CPUs and Instinct MI400-series GPUs with Cerebras' wafer-scale engine, and Microsoft has said it will deploy Helios at scale on Azure. Separately, AMD chief executive Lisa Su told reporters that the company is close to securing HBM4 memory supply from Samsung.
NAVER, NVIDIA and Brookfield expand Korean AI factory to 200 megawatts
NAVER, NVIDIA and Brookfield Asset Management announced on July 25 that they will expand NAVER's NVIDIA DSX AI factory at the GAK Sejong hyperscale data center in Sejong, South Korea, from an initial 55-megawatt footprint to 200 megawatts by 2028, with a total financing envelope of $10 billion. Brookfield is acting as the exclusive capital partner with a nonbinding term sheet of up to $9 billion, NVIDIA is investing roughly $1 billion as an equity stake in NAVER Corp., and NAVER will fund the remainder. The factory will run Vera Rubin and Blackwell systems on NVIDIA's DSX platform and support NAVER's HyperCLOVA X models, which are being advanced using NVIDIA Nemotron 3 Ultra open models. NAVER became the first Korean company admitted to the NVIDIA Nemotron Coalition and plans to launch an AI agent platform in Korea in the second half of 2026 alongside a Seoul World Model built on NVIDIA Cosmos. The announcement followed a July 24–25 AI summit in San Francisco hosted by South Korean President Lee Jae Myung, where SK Group and NVIDIA outlined a separate initiative valued at more than $500 billion covering large-scale AI data centers and next-generation memory, and Samsung Electronics signed a memorandum of understanding with Broadcom covering memory chips, foundry services and advanced packaging.
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